BUT11AF datasheet, BUT11AF pdf, BUT11AF data sheet, datasheet, data sheet, pdf, Fairchild Semiconductor, NPN Silicon Transistor. BUT11AF. GENERAL DESCRIPTION. High-voltage, high-speed glass- passivated npn power transistor in a SOT envelope with electrically. BUT11AF NPN Silicon Transistor. Absolute Maximum Ratings TC=25°C unless otherwise noted. Symbol VCBO Parameter Collector-Base Voltage: BUT11AF.

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Observe the general handling precautions for electrostatic-discharge sensitive devices ESDs to prevent damage to MOS gate oxide. August 8 Rev 1. Region of permissible DC operation. SOT; The seating plane is electrically isolated from all terminals. No liability will be accepted by the publisher for any consequence of its use.

August 7 Rev 1. August 4 Ptot max and Ptot peak max lines. Product specification This data sheet contains final product specifications. Extension for repetitive pulse operation.


Normalised power derating and second breakdown curves. Reverse bias safe operating area.

BUT11AF Datasheet

Application information Where application information is given, it is advisory and does not form part of the specification. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.

The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Typical base-emitter saturation voltage. Test circuit inductive load. Refer to mounting instructions for F-pack envelopes.

NPN Silicon Transistor

Typical base-emitter and collector-emitter saturation voltages. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.


Exposure to limiting values for dtaasheet periods may affect device reliability. Test circuit for VCEOsust.

Typical DC current gain. Test circuit resistive load. Forward bias safe operating area.

Switching times waveforms with resistive load. Reproduction but1a1f whole or in part is prohibited without the prior written consent of the copyright owner. August 2 Rev 1.

Switching times waveforms with inductive load.

BUT11AF 데이터시트(PDF) – Motorola, Inc

These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. UNIT – – 1. Stress above one or more of the limiting values may cause permanent damage to the device.

Oscilloscope display for VCEOsust.